# PCI Express reference resetn
set_property PACKAGE_PIN  F11      [get_ports pcie_resetn]
set_property IOSTANDARD   LVCMOS33 [get_ports pcie_resetn]



# PCI Express reference clock 100MHz
set_property PACKAGE_PIN  U8             [get_ports {pcie_ref_clk_p[0]}]
create_clock -name  pcie_clk -period 10  [get_ports {pcie_ref_clk_p[0]}]
set_clock_groups -asynchronous  -group [get_clocks pcie_clk] 



# MGT locations
set_property PACKAGE_PIN M6  [get_ports {pcie_mgt_rxp[0]}]
set_property PACKAGE_PIN P6  [get_ports {pcie_mgt_rxp[1]}]
set_property PACKAGE_PIN R4  [get_ports {pcie_mgt_rxp[2]}]
set_property PACKAGE_PIN T6  [get_ports {pcie_mgt_rxp[3]}]
set_property PACKAGE_PIN V6  [get_ports {pcie_mgt_rxp[4]}]
set_property PACKAGE_PIN W4  [get_ports {pcie_mgt_rxp[5]}]
set_property PACKAGE_PIN Y6  [get_ports {pcie_mgt_rxp[6]}]
set_property PACKAGE_PIN AA4 [get_ports {pcie_mgt_rxp[7]}]


set_property PACKAGE_PIN L4  [get_ports {pcie_mgt_txp[0]}]
set_property PACKAGE_PIN M2  [get_ports {pcie_mgt_txp[1]}]
set_property PACKAGE_PIN N4  [get_ports {pcie_mgt_txp[2]}]
set_property PACKAGE_PIN P2  [get_ports {pcie_mgt_txp[3]}]
set_property PACKAGE_PIN T2  [get_ports {pcie_mgt_txp[4]}]
set_property PACKAGE_PIN U4  [get_ports {pcie_mgt_txp[5]}]
set_property PACKAGE_PIN V2  [get_ports {pcie_mgt_txp[6]}]
set_property PACKAGE_PIN Y2  [get_ports {pcie_mgt_txp[7]}]

#DCI
set_property slave_banks {32 34} [get_iobanks 33]

